Earlier this week, Linux 7.1 dropped 486 support, as they had previously considered, and while it was long discussed, I can't help but think of this diagram I drew a few months ago (I updated it slightly for linux 7.1):
32-bit is effectively another species, with little code-compatibility (according to others, apparently). It's the new 8-bit. Since my background was in microbiology, I tend to see code as a lot more mutually intelligible. But I can see why they want to drop 32 bit instructions. They're like sandbags on a hot air balloon. They need a little extra lift.
As chipmakers are getting back into memory production, EUV will be an opportunity to develop chips that embed memory in ways that are far more economical. Currently, DRAM is typically integrated on a different chiplet.
As I wrote in the Phoronix forum,
"My observation is that it would be far more economical for the foundry
to integrate both DRAM and CPU on the same chip, but the leading edge's
reservations are typically held by the highest bidders, which Nvidia
recently overtook Apple in TSMC slots https://www.cnbc.com/2026/04/08/tsmc...ing-intel.html
"Nvidia has reserved the majority of TSMC’s leading CoWoS technology, and capacity is so heavily booked that TSMC has reportedly outsourced some steps to third-party companies that specialize in simpler parts of the process, such as ASE and Amkor."
"NVIDIA Alone Has TSMC’s Advanced Packaging Lines Booked for Several Years Ahead, Leaving Little Room for Competitors"
That really leaves only a few foundries that have already received the
1.4nm EUV machines, such as Intel, Samsung, and Rapidus to run these
experiments. It doesn't seem like Intel is interested in testing my very
expensive experimental idea, but they own all the IP to make it happen
(Quark, ARM architectural license, eDRAM, HighNA EUV).
Curiously, Nvidia also owns a 386SX/IP license, called the M6117C https://www.nvidia.com/en-us/drivers/uli-m6117c/, but it's unclear if they'd be willing to manufacture one at 1.4nm with 16MB HBM3e RAM. They also have an ARM license,
so really it's not an issue whether they pick one or the other. I like
to think of my idea as an expensive CERN experiment- it's like particle
physics, and very little immediate practicality."
1993- Pentium P54C was on 800nm
2011- Pentium Claremont was on 32nm. Intel was testing out its newest and most expensive lithography machine to produce a 17 year old chip
2026- Intel has began piloting a 1.4nm EUV machine from ASML, but no information is available whether they ever repeated the 2011-like test on 1.4nm (or really, any other nodes).
If you insist on 64-bit, then start with the Pentium IV Northwood Prescott
The first 64-bit Pentium was the Prescot 2M in 2003:
"The Prescott Pentium 4 contains 125 million transistors and has a die area of 112 mm2.[33][34] It was fabricated in a 90 nm process with seven levels of copper interconnect.[34] The process has features such as strained silicon transistors and low-κ carbon-doped silicon oxide (CDO) dielectric, which is also known as organosilicate glass (OSG).[34] The Prescott was first fabricated at the D1C development fab and was later moved to F11X production fab.[34]"
"The only advantage the 3.73 GHz Pentium 4 Extreme Edition had over the 3.46 GHz Pentium 4 Extreme Edition was the ability to run 64-bit applications since all Gallatin-based Pentium 4 Extreme Edition processors lacked the Intel 64 (then known as EM64T) instruction set."
Many Linux distributions such as Red Hat Linux 10 no longer support earlier versions of x86_64 & v2:
"Red Hat will upgrade the instruction set architecture (ISA) baseline to the x86-64-v3 microarchitecture level in RHEL 10 and x86-64-v1 and x86-64-v2 x86-64 microarchitecture level of CPUs will be marked deprecated in RHEL 8 and RHEL 9 and unsupported in RHEL 10."
https://developers.redhat.com/articles/2024/01/02/exploring-x86-64-v3-red-hat-enterprise-linux-10.
"Compatibility impact
The x86-64-v3 level has been implemented first in Intel’s Haswell CPU generation (2013). AMD implemented x86-64-v3 support with the Excavator microarchitecture (2015). Intel’s Atom product line added x86-64-v3 support with the Gracemont microarchitecture (2021), but Intel has continued to release Atom CPUs without AVX support after that (Parker Ridge in 2022, and an Elkhart Lake variant in 2023)."
Why this has anything to do with mainline linux maintenance has to do with the ever increasing system requirements of computers that limit compatibility with running a modern OS. Sure, the 486 got nearly 37 years of support. But for newer systems, they might not even get 5 years of support (just look at Windows 11 support for first generation Ryzen- not that anyone would want to use Windows 10 on Zen 1). And for a lot of users, having a chip with an advanced instruction set is only needed if there is some obscure security benefit (which, admittedly, is always easy to claim, but not always needed for less private activities)
Mark Weiser wrote in his 1991 "The Computer for the 21st Century" essay for Scientific American Ubicomp Paper,
"Jim Morris of Carnegie-Mellon University has proposed an appealing general method for approaching these issues: build computer systems to have the same privacy safeguards as the real world, but no more, so that ethical conventions will apply regardless of setting. In the physical world, for example, burglars can break through a locked door, but they leave evidence in doing so. Computers built according to Morris's rule would not attempt to be utterly proof against cracker, but they would be impossible to enter without leaving the digital equivalent of fingerprints."
Perhaps so much effort has gone into preventing security breaches that such an effort might appear to be naive and impractical or simply counterintuitive. There are, systems that do employ some form of eidetic memory. However, I think such a system might run into caching issues, and run out of data fairly quickly. I also do not think it's a foolproof way to catch an intruder, although Bitcoin is able to track the visible part of the transactions- the ledgers, but not always the recipients or shell companies.
Thus designing simple systems today should be fairly lightweight on a smaller node- a chip designed to rely on public wifi, mesh networking, or citizen band radio (CB) is obviously less secure, but not synonymous with lightweight systems. An experimental processor wouldn't be worth the time of an expensive foundry without a cryptoprocessor, or a way to encrypt the home folder (e.g. ZFS), that I understand. It was not so long ago that home telephone lines also depended on party lines. Thus, while it may seem like requesting a simple, unencrypted or lightly secured chip technology from the 1990s might sound impractical in today's age, the amount of individuality a personal computer today offers is far greater ever since the Xerox Alto was designed to be for a single person, compared to the time-sharing systems in the preceding decade.
When I drew these system on a chip diagram in 2021, I didn't really put much thought into the video ram, but one thing is still constant- 6uA/MHz is a solar powerable CPU:
And this chip idea should put things into more context:
Sure, one could integrate an i915 graphics chipset with a Pentium IV Extreme Edition, but a certain food critic might immediately pooh pooh anything slightly stale because it doesn't have AVX-512 or beyond.
As I wrote in my 2025 paper, a Pentium IV might utilize 55 million transistors (the non 2M version):
Whether or not 2D DRAM will improve yields and lower costs enough to make this a more trivial question remains to be seen, but for the time being the most common customers are not people like you and I:
If these product ideas are ever found valuable, they are never likely to admit it to me. But I am open to consulting work, and I prefer full-time imagineering, an occupation first coined by Alcoa in the 1940s.
Edit: I was going to write a supplement to this on MICE (money, ideology, compromise/coercion, and ego), but I wasn't sure if it had much relevance to this post. I suppose in a way, it could prevent or delay certain types of development, but it's not immediately clear how technology projects and ideas get stalled. Speculating on that is only for the most pessimistic and paranoid, which I am not (although if I really wanted to search deeper for answers, I'd probably find more conclusive evidence, which no one wants to be found with).
Side note:
In elementary school, I had a teacher who used to ask questions that would get few to no responses, kind of like "Bueller, Bueller?"
She'd mention that we were the "Peanut gallery." Back then, I imagined it was a silent audience like the Mr. Planters peanuts, who looked like people but were actually mute (like mannequins in Home Alone). But recently, I learned it's the opposite:
"Peanut gallery" is slang for a group of people offering unwanted, uninformed, or heckling criticism. It commonly refers to spectators, social media commenters, or observers who provide disruptive or sarcastic feedback. The term implies the commentary is insignificant, petty, or from an audience with lesser understanding.
"Usage: Often used in the phrase "no remarks from the peanut gallery" to silence noisy critics or irrelevant advice.
The funny thing is, the phrase can be flipped upside down, by adding a question mark:
"no remarks from the peanut gallery?" Maybe that's how she phrased it.
In this case, I think the lack of comments, as many blogs are, makes this a journal with one reader. So if you do enjoy anything I wrote here, or have any comments, I would be happy to hear from you. Your discarded peanut shells are welcome too. It's good to break out of your shell anyways.
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